Needing more than a spark test?

Got a ground plane (zone) in place. More than 1/2 the errors disappeared. Not to figure out how to draw some sort of split power plane. Highlighting the nets gives me an idea, but this is going to be slow work. Hoping to have something that works out, so I don't have to add more planes. However, if the ADC and processor get added to the board (which I intend to do at some point) think the additional planes would be desirable.

@homebrewed I have the part at this point, and the design simulated ok, so I will go with it. Might experiment with getting more gain out of it...
 
Finally made it through the planes, and splitting. KiCAD is not that great for helping one do this. It was brute force aided with a cut out or two. No straight lines, just some hokey funny polygon that you had to do on the fly. I wanted to add some additional vertices, so I could make the shape better, but couldn't find a way to do that. Dark green is the ground which covers everything. The bottom light green is -2.5V, whereas the top light green is +2.5V. There's slightly over a 0.5mm gap at the narrowest spots. There's no significance to the current board size which is currently 86 x 60 mm. I could obviously make it smaller. (Or make it more complete, by including a power supply, and the ADC and processor and display) The ILI9341 display I have is larger than this board. For the future, I could put the diode on the back side which is practically free of components. There iare only two 0603's on the back side. I had room on the front side, for the component, but not for the silkscreen, and it did make the routing a little easier to put the two caps on the back.
1676587027533.png

I will redraw board outline in FreeCAD and import it. I can't stand having the mounting holes in haphazard locations, and the dimensions being weird numbers, but KiCAD's drafting mode is a bit difficult for me to get what I want.
 
Finally made it through the planes, and splitting. KiCAD is not that great for helping one do this. It was brute force aided with a cut out or two. No straight lines, just some hokey funny polygon that you had to do on the fly. I wanted to add some additional vertices, so I could make the shape better, but couldn't find a way to do that. Dark green is the ground which covers everything. The bottom light green is -2.5V, whereas the top light green is +2.5V. There's slightly over a 0.5mm gap at the narrowest spots. There's no significance to the current board size which is currently 86 x 60 mm. I could obviously make it smaller. (Or make it more complete, by including a power supply, and the ADC and processor and display) The ILI9341 display I have is larger than this board. For the future, I could put the diode on the back side which is practically free of components. There iare only two 0603's on the back side. I had room on the front side, for the component, but not for the silkscreen, and it did make the routing a little easier to put the two caps on the back.
View attachment 437961

I will redraw board outline in FreeCAD and import it. I can't stand having the mounting holes in haphazard locations, and the dimensions being weird numbers, but KiCAD's drafting mode is a bit difficult for me to get what I want.
EasyEDA's design tool is a little funny as well when it comes to splitting ground planes. I would draw one, put another one down -- and it would disappear! It turns out that the program doesn't like separate "islands" unless you tell it that's what you want. Drove me nuts until I figured that one out!
 
EasyEDA's design tool is a little funny as well when it comes to splitting ground planes. I would draw one, put another one down -- and it would disappear! It turns out that the program doesn't like separate "islands" unless you tell it that's what you want. Drove me nuts until I figured that one out!
How many layers will EasyEDA do? Is it limited? I'm deciding on whether I want to upgrade KiCAD or not. V7 has been released, I'm using V6. It works, but it's clunky, especially with the internal drawing tools.
 
Focus ring update:

Focus ring#2.JPG

The cylinder in the middle is a bit of teflon. It has a lip on the bottom (not shown) that fits snugly in the aperture hole. Its purpose is to make it easier to precisely align the focus ring with the aperture hole; and also to serve as a temporary support for my 8 Am241 disks that will be glued in a bit later. After the epoxy has set up I will remove the teflon bit and, finally, glue in a lead ring that fits right around the aperture hole. The ring makes sure that no x-rays from the sources will get to the detector. I hope......
 
How many layers will EasyEDA do? Is it limited? I'm deciding on whether I want to upgrade KiCAD or not. V7 has been released, I'm using V6. It works, but it's clunky, especially with the internal drawing tools.
They claim it can handle up to 34 layers. I found the information here.
 
Got a ground plane (zone) in place. More than 1/2 the errors disappeared. Not to figure out how to draw some sort of split power plane. Highlighting the nets gives me an idea, but this is going to be slow work. Hoping to have something that works out, so I don't have to add more planes. However, if the ADC and processor get added to the board (which I intend to do at some point) think the additional planes would be desirable.

@homebrewed I have the part at this point, and the design simulated ok, so I will go with it. Might experiment with getting more gain out of it...
You can afford to increase the RF to about 400K, but adding gain in subsequent stages is more effective, because that gain multiplies the TIA gain.
Rf = 20K up to about 220K is the range I think will work best. It needs to be enough to amplify the noise beyond where the noise from subsequent stages is minor in comparison, but I think you already know how to do all that from RF receivers experience.

The gain is already extreme, all because I have some uncertainty about how much a current a highest expected photon would have.
Is it 45 pA? Is it 120pA?, Is it as much as 1nA? The dark current DC is 4nA.

Using RF = 20KΩ gives gain 20log10(20000) = 86dBΩ (It's a TIA). That is lots more than a normal RF low noise amplifier.
Then we pile on another x100, meaning 40dBV
Then another x23, so another 27dBV
I never made a stable amplifier at anything like these gains.
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With RF = 220KΩ, and then next stage gain = x100, and then last stage gain = x(1+91) = x92.
Then approx 1nA high input pulse current would deliver very near 2V at the output.
This might be a "reasonable maximum", but I don't know.
Competing with a photomultiplier electron tube is something I never did before!
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@WobblyHand :
Hi Bruce. So I created symbol AD7667, copied the AD7622 into it, then I edited pin 39 name to become INGND.
It has the same footprint.

The only thing I am unsure of is the something called [property "Reference "Y?" (id 0) (at -17.78 46.99 0]
It may be about the position I put it down, or maybe the "U" needs to be edited in some way so it can automatically get the sequential "U?".
 

Attachments

@WobblyHand :
Hi Bruce. So I created symbol AD7667, copied the AD7622 into it, then I edited pin 39 name to become INGND.
It has the same footprint.

The only thing I am unsure of is the something called [property "Reference "Y?" (id 0) (at -17.78 46.99 0]
It may be about the position I put it down, or maybe the "U" needs to be edited in some way so it can automatically get the sequential "U?".
So is this a AD7667 or AD7622 footprint? I found an AD7667 symbol and footprint on SnapEDA, which seems ok. I need to check it, but I have already imported it into my global libraries.

I found that when I did the display (first attempt in KiCAD) that I didn't model the mounting holes, but instead embedded them in the board itself. It worked, but a more flexible approach would be to model the pins and NPT mounting holes, so it would behave as a normal component. I may give that a try. Probably will seek advice on the KiCAD forum for that. I have a partial FreeCAD model for the display, that I could use as the start. I know the footprint and NPT holes worked on my ELS board.
 
So is this a AD7667 or AD7622 footprint? I found an AD7667 symbol and footprint on SnapEDA, which seems ok. I need to check it, but I have already imported it into my global libraries.

I found that when I did the display (first attempt in KiCAD) that I didn't model the mounting holes, but instead embedded them in the board itself. It worked, but a more flexible approach would be to model the pins and NPT mounting holes, so it would behave as a normal component. I may give that a try. Probably will seek advice on the KiCAD forum for that. I have a partial FreeCAD model for the display, that I could use as the start. I know the footprint and NPT holes worked on my ELS board.
The footprint should be good for both. It's a 48-pin quad flatpack.
OK - here we go really carefully. I definitely don't want you to get inadvertently misled. By all means, use the SnapEDA symbol if it fully works for you. I do not get involved with SnapEDA, so I don't know what the imported symbol is like. I wanted mine to have the data stuff connections to the right, and the analogue signal inputs on the left. I suppose one could just edit the import graphic.

The symbol I have posted is not yet perfect in the all the names assigned to the pins, but nearly so, except possibly for Pin 7. That one is called IMPULSE in AD7667, and /NORMAL in AD7622

It takes a step-by-step check to discover exceptions, and this is what I am doing now. Definitely, in the recommended connections diagram, all the electrical functions that matter are on the correct pins.
Checking..
The ones that I see that have any differences, whether in names, or where they are connected in the Figure26, are highlighted in red.
AD7667 Pins.png
For you, pins 5, 8, 6 connect high, to DVDD. For me, they connect low. The names are correct.
For you, using BYTESWAP, you use pin 4, and IMPULSE pin 7. That is a bit special.
They are shown connected hard to the 0V, meaning DGND.

The BYTESWAP state normally sets up which which data pins the LSB and MSB 8 bits are output to, but can be used to swap the bytes to allow an 8-bit (Teensy) interface. My only comment here is BYTESWAP, delivered from the Teensy, should be delivered relative to OGND on Pin17.
As before, we do not allow Teensy digital returns to find a way to AGND via the DGND on pins 20, 30
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Re: the footprints. Looking at the data sheet, I believe they are identical. Every pin number on the 40-pin flatpack does the same thing. Only one pin I can see has a name that is changed.
I have been stepping through the AD7667 data sheet pin definitions.
Pins 3, and 40 are "NC" not connected on the chip. I have a pin 40 on the symbol named "NC". I managed not to have a pin 3. The footprint will have a pin to solder to, but it has no function.

Other than renaming Pin7 to be IMPULSE, I have not seen any more differences (yet).
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About "HOLE"
When it comes to mounting holes, I once created a component called "HOLE".
Getting more imaginative, I called it "M3_HOLE".
It was basically a huge via, near 7mm full diameter, 3.05mm hole, with no silkscreen on it, so it would "ground" via the mounting screw, like a PC motherboard. Since then, I learned better. That is a great way to share unwanted currents with every other PCB in the chassis!
I still would use the big via, but not connect to the ground plane unless I had good cause.
 
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