Great stuff, considering the high DC gain of the signal path!
One thing I'd be curious about is the voltage on the output of the integrator. That amplifier might run out of headroom & once that happens the offset will go up very rapidly.
You are right in that the one I have more or less thrown together is not quite a real classic integrator, partly hijacked from another circuit. It still needs some care, and more normal integrator would have a resistor across C4. I will try and explain.
It's not just an integrator that has to keep "getting lucky", to not add itself up onto a rail. It's an integrator in a control loop, that pumps itself up and down, but at a pace determined by it's R and C. This is similar to the "I" in a regular PID controller, with the output never satisfied, forever unstable, oscillating about the set point.
It is a loop devoted to undoing everything the gain opamp is trying to do for it's non-inverting input, insisting the output be zero. With the integrator in there it becomes a thing that still insists the output be zero, but fails to do it instantly, blunted by the integrator pole time constant. The integrator ends up holding a charge just sufficient to cancel any offset building up on the U4 (Vout). It has no chance of stopping a passing 20uS pulse.
Just like with any PID controller, if the gain of the integrator is taken too high, it will cause the loop to go into mad oscillation. Putting an integrator in a loop comes with the minus sign, which is a 180° phase shift delay, the immediate recipe for an oscillator, and this is what does happen. It will pump itself up and down around the set point, in the same way a temperature controller oscillates in a gentle, damped, controlled way.
Of course, a slow responding thing like an oven has a very low natural frequency, so there is plenty of time to have a control loop with a bandwidth at least two octaves faster.
The ad hoc bias remover
Now we come to the "opportunistic" bias removing integrator. To start with, the opamp has only -2fA to 4fA input bias. A 100nF capacitor could stay charged for a long time at that rate. Then also, it has a 500MHz GBW. The opamp could easily take off on it's own at VHF frequencies, and a 100nF capacitor in it's feedback is an invitation to bang between the rails, were it not for the big resistors.
The inverting input R is 10MΩ. That time constant is 67% of a whole second. 0.159Hz is long-term!
Then consider the non-inverting input. There is a 100pF capacitor C5 to charge via the 10MΩ resistor. The CR product is 0.001sec. The roll-off is at 159Hz. Anything much faster is not going to move the integrator.
Then there is the (I think unwise) 10K (R9) with 100nF (C6) lowpass. Another pole at 159Hz? C6 is a nearly decoupler.
Finally, there is the (low) fractional gain for it's effect. Through U6 it has gain=1, and through U4, it has gain 0.22.
Of course, there is room to explore it more. Some of the circuit still has RC filters baggage from where I got it from, but when I tried it in a reasonably hardball checked out simulation, it started to look effective. I do notice that results are worse if the correction is applied to the U2 stage further back. The loop would be trying to fix the offset via gain 2300.
So far, opamp stuff I have simulated has always "just worked", except for stupid accidents and stumbles, like mistaken values, or wrong IC, or putting a resistor where a capacitor should be.
What about "stretched" pulses?
I guess it might need some rework, but probably not. Even pulses slowed up to take (say) 300uS would still be too fast to bother it. It should be OK.
