I've been away from the internet for a few days. Amazing to get out into the wild now and then.
It is interesting and useful to think in more detail about how these systems work.
The simple algorithm outputs a pulse 2 of 3 times there is an input pulse for a 2/3 ratio, in a repeating skip, pulse, pulse sequence. This rotates the magnetic field (not quite instantly, the rotation is impeded by the drive voltage, inductance and drive electronics bandwidth to the change of currents). The mechanical system filters these inputs according primarily to the rotating inertia and effective "spring" constant from the torque of the system, which is usually dominated by the motor's rotor. Each "microstep" is on the order of some tenths of a thousandth or less. The smaller you make the microsteps the less stiff they are (some say torque is reduced, but this probably isn't the best way to think about it, if it lags a bit behind there is essentially no torque lost, so loading mostly affects lag, and more lag likely results in more effective filtering and smoother motion). The rotating magnetic fields are exerting force on the rotor, pulling it around. The resulting average errors from the digitization would be less than one microstep, plus any lag needed to develop adequate torque. Many people have already built these types of systems, and they have these types of motors and drives. It seems to work pretty well, I haven't been finding that people's simple DIY ELS systems failed to meet their needs, at least none have said on their internet videos or pages that I have noticed. There are many imperfections in the mechanical system gears and leadscrews already (of lathes we can afford), not just this. This is probably not even the dominant error source in the system. There are ways to improve it if that is actually an important requirement, like using a precision gearmotor or a servo with high encoder resolution, and a higher resolution spindle encoder.
The errors caused by trying to synchronize a separately generated timing signal would have to be analyzed. The source would generally have discrete timing steps that would not match the needed pulses, so there would be errors there, some of which might be cumulative. A number of rapid and precise timing and calculations would be required to make it work. The feedback loop to monitor the spindle RPM and compute the needed position updates of the leadscrew, and feed back to the timing controller would add additional errors and feedback loop stability issues. It is certainly a valid approach to the problem, however it is far from simple, and it is much more difficult to predict the performance before you build and debug it. It seems like a rough way to do it, but perhaps it would be simpler once the design was developed. It seems like there might be a high computational load to get a good closed loop bandwidth. It would be interesting to see some examples of this approach that have already been developed. Have you found any?
In any case one wanting to experiment with that type of control should probably select a microcontroller well suited to that technique - perhaps not a Pico. This synchronized pulse generator technique is more of a hardware design approach, and seems better suited to an FPGA rather than a microcontroller. I would choose a microcontroller than had an adequate onboard FPGA, use a separate Microcontroller and FPGA, or use an FPGA that has an internal microcontroller or FPGA IP that can be compiled into the FPGA directly. We worked with all of those on projects in the past. Very impressive and flexible hardware. To have success with that approach the team needs to have the requisite skills to operate in that design environment, which is a mix of microcontroller, software and FPGA hardware logic design. But that way you can implement timers that have the properties that are needed and are mated in the appropriate way. Doing it with discrete timers in or external to microcontrollers will likely add inter-timer delays and various issues that may not be resolvable without adding additional hardware. The nice thing about an FPGA design is that you can keep tuning the FPGA logic implementation and not generally have to rip up the hardware later in the project as long as adequate capability was chosen in the FPGA.
What is needed to implement it? Measurements of the encoder timing, a pulse generator that can be programmed an dynamically adjusted while it continues to generate smooth pulse trains. The calculations to provide the controls. Enough computational bandwidth to handle them at a high enough rate to have adequate closed loop performance when the lathe encounters spindle loading and slows down - a phase locked loop.
In any case it is an interesting approach. The question is - is the improvement it promises worth the cost/complexity?